Stanford EE Computer Systems Colloquium

4:30 PM, Wednesday, May 23, 2018
NEC Auditorium, Gates Computer Science Building Room B3
http://ee380.stanford.edu

The future of low power circuits and embedded intelligence: emerging devices and new design paradigms

Edith Beigné
CEA-LETI
Grenoble, France

About the talk:

Circuit and design division at CEA LETI is focusing on innovative architectures and circuits dedicated to digital, imagers, wireless, sensors, power management and embedded software. After a brief overview of adaptive circuits for low power multi-processors and IoT architectures, the talk will detail new technologies opportunities for more flexibility. Digital and mixed-signal architectures using 3D technologies will be presented in the scope of multi-processors activity as well as imagers and neuro-inspired circuits. Also, the integration of non-volatile memories will be shown in the perspective of new architectures for computing. Finally, embedding learning will be addressed to solve power challenges at the edge and in end-devices: some new design approaches will be discussed.

About the speaker:

[speaker photo] Edith Beigné joined CEA-LETI, Grenoble, France, in 1998. She is the Research Director of Integrated Circuits and System Division at CEA LETI. Since 2009, she has been a senior scientist in the digital and mixed-signal design lab where she researches low power and adaptive circuit techniques, exploiting asynchronous design and advanced technology nodes like FDSOI 28nm and 14nm for many different applications from high performance MPSoC to ultra-low power IoT applications. Her main reasearch interests today are low power digital circuits, neuro-inspired architectures and 3D integration. She is part of ISSCC TPC since 2014 and part of VLSI'symposium since 2015. Distinguished Lecturer for the SSCS in 2016/2017, Women-in-Circuits Committee chair and JSSC Associate Editor since 2018. She is currently visiting Stanford University.

Contact information:

BEIGNE Edith 164460